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Technology

先進技術

What is FO-WLP:

Fan-Out Wafer Level Package (FO-WLP) has been developed to offer additional space for routing higher number of I/O on top of silicon chip area and extending the package size with so-called the fan-out process which cannot be possibly applied in conventional Fan-In Wafer Level Package (FI-WLP).

Fan-Out Wafer Level Package

Target Application :

  • Low Pin Count Application for PMIC/ RF/ WIFI/ PA/ Audio etc.

Benefits :

  • Single or multiple dies embedded in molding compound to have more IO than WLCSP by applying fan-out wafer level RDL processes.
  • Thin dielectrics RDL with fine lines routing capability.

Target Application :

  • Mobile Application for Smart Phone & Tablet, High-End AP/BB

Benefits :

  • Small form factor & thin package

Target Application :

  • High-End Application for High Performance Computing, Networking & Data servers

Benefits :

  • High IO / High bandwidth with fine line/multi-layer RDL routability
  • Bridging technology in molding compound
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